1. Field of the Invention
The present invention relates to a digital TV receiver and more particularly to detecting a vertical synchronizing signal in a digital TV receiver using a vestigial sideband (VSB) system.
2. Discussion of Related Art
As the next generation of digital TV system, the High Definition Television (HDTV) has been continually developing to ultimately bring the theater right into the living room of a viewer. When compared with an existing analog TV, a digital TV not only has a higher resolution and a larger size in the horizontal direction, but produces a vivid sound comparable to a compact disc via a multi-channel. However, due to the many ways to transmit the data, a standardization of the digital TV (DTV) are still being settled among mainly U.S.A, Europe and Japan.
In U.S.A., a VSB system proposed by Zenith has been adapted as a transmission format, a Motion Picture Expert Group (MPEG) has been adapted as a video compression format, a Dolby AC-3 has been adapted as an audio compression format, and an existing but compatible display method has been adapted as a display format. To transmit compressed image data under the above standards for a DTV, an error correction coding (ECC) is executed on the compressed image data. Particularly, a synchronizing signal is inserted between data at predetermined periods before transmission, thereby facilitating the recovery of the data at a receiving side.
The synchronizing signal is classified into two kinds, where one is a horizontal synchronizing (hsync) signal commonly called xe2x80x98a data segment synchronizing signalxe2x80x99, and the other is a vertical synchronizing (vsync) signal commonly called xe2x80x98a field synchronizing signalxe2x80x99. The hsync and vsync signals of the digital TV differ from the horizontal and vertical synchronizing signals of a National Television System Committee (NTSC) television.
FIG. 1 shows a transmission signal frame of the digital TV in a VSB system. As shown, one frame is comprised of two fields, where each field includes 313 data segments and where each data segment includes 832 symbols of 4 hsync signals and 828 data symbols. Because the hsync signal does not undergo the ECC process, each data segment includes 4 symbols of hsync signal and 828 symbols of ECC signal. Also, each field includes 313 data segments, one of which is a vsync segment containing a training sequence and the remaining 312 are general data segments.
Also, before transmission from a transmitting side such as a broadcasting station, the signal to be transmitted is passed through a mapper by which the signal is changed into desired power levels. For a ground broadcasting type of 8 VSB, the output level of the mapper corresponds to one of 8-step symbol values (amplitude level). Moreover, according to predetermined agreement, the mapper forcibly inserts the 4 symbols of the hsync signal for every 832 symbols and forcibly inserts the vsync signal in the position of every 313th data segments. Furthermore, with two logic levels, a prescribed logic level of the hsync signal xe2x80x981, 0, 0, 1xe2x80x99 is continually repeated in every data segment.
FIG. 2 shows the vsync signal of one data segment length, arranged in order from a hsync pattern xe2x80x981001xe2x80x99 positions of four symbols, a training sequence positions of an adaptive equalizer for signal waveform equalization, a VSB mode signal position, and a reserved area. As shown, the training sequence is made of one PN 511 signal sequence and three PN 63 signal sequences, in which the second PN 63+ signal sequence changes its polarity, i.e. from xe2x80x981xe2x80x99 to xe2x80x980xe2x80x99 or from xe2x80x980xe2x80x99 to xe2x80x981xe2x80x99 , for every field.
The hsync signal serves to determine the starting position of a data segment and also to recover the timing of the system. In other words, the receiving system first detects the hsync signal for the data recovery, and utilizing the detected hsync signal, recovers the timing and the vsync signal. However, even when the logic level symbols (xe2x80x981001xe2x80x99) of the hsync signal is repeated in every data segment, it is difficult to detect in damaged channels due to ghosts of a large size. If the hsync signal is not detected, the system timing and the vsync signal detection cannot be recovered, thereby either delaying or impeding the data recovery.
Therefore, a general data symbol which allows a system timing recovery without utilizing a hsync signal is disclosed in xe2x80x9cA BPSK/QPSK timing-error detector for sampled receivers,xe2x80x9d IEEE transactions on communications, Vol. COM-34, No. 5, May 1986. According to the disclosed method, detection of the hsync signal is not required for the system timing recovery. Nevertheless, the hsync signal is still required for the data recovery and must be recovered.
Accordingly, an object of the present invention is to solve at least the problems and disadvantages of the related art.
An object of the invention is to allow detection of a vsync signal prior to a hsync signal in a digital TV.
Additional advantages, objects, and features of the invention will be set forth in part in the description which follows and in part will become apparent to those having ordinary skill in the art upon examination of the following or may be learned from practice of the invention. The objects and advantages of the invention may be realized and attained as particularly pointed out in the appended claims.
To achieve the objects and in accordance with the purposes of the invention, as embodied and broadly described herein, an apparatus for detecting a vsync signal in a digital TV comprises a vsync correlating unit obtaining a correlation between a received VSB signal and a previously determined vsync signal; a maximum value position detector detecting the position of a symbol having a maximum correlation with the vsync signal in every field to output the detected position; and a reliability measurer preventing a wrong position determination of the vsync signal.
Preferably, a hsync signal is detected at a position relative to the vsync signal output from the reliability measurer. Also, a vsync signal in the next field is detected at a position relative to the vsync signal output from the reliability measurer.
According to another aspect of the present invention, a method for detecting a vsync signal in a digital TV comprises obtaining a correlation between a received signal and the vsync signal utilizing a pattern inserted by a transmitting side; detecting the position of a symbol having a maximum correlation in every field to output the detected position; and checking the reliability of the output of the detected maximum value position. In the last step, if the reliability is over a determination threshold value, the position of the symbol detected is recognized as the position of the vsync signal.
According to yet another aspect of the present invention, an apparatus for detecting sync signal in a digital TV detects a vsync signal, the polarity of data, and an odd/even field sync signal from a received digital VSB signal utilizing a correlation between the received digital VSB signal and a prescribed reference vsync signal. Thereafter, the hsync signal is detected from the vsync signal as discussed above.
The apparatus for detecting the sync signals in the digital TV includes a DC eliminator eliminating DC from the received VSB signal; a sync signal detecting unit generating various sync signals for use in correlating the DC-eliminated VSB signal with the reference vsync signal; and a polarity corrector correcting the polarity of the DC-eliminated VSB signal using the polarity detected in the sync signal detecting unit.
The sync signal detecting unit comprises a vsync correlator obtaining the correlation of the DC-eliminated VSB signal with the reference vsync signal; a maximum value position detector detecting the position and polarity of a symbol having a maximum correlation with the reference vsync signal for every field; a reliability measurer preventing an inaccurate detection of the polarity and the vsync signal; a sync signal generator generating the various synchronizing signals.